FAPEC [1], the Fully Adaptive Prediction Error Coder, is a high-performance and versatile data compressor which encompasses a suite of pre-processing algorithms for images, time series or even text files. Tailored stages can be implemented as well, to better adapt to specific kinds of data. It relies on PEC [2], an outlier-resilient entropy coding core with run-length and low-entropy extensions. FAPEC is, currently, one of the best options for cubesats, as demonstrated by the Spire Global constellation already using FAPEC since late 2017. However, despite its excellent performance, some scenarios may require even faster solutions with even smaller code and memory footprints.
On-Board Computers (OBC), not to be confused with On-Board Data Handling systems (OBDH), are a clear example of this. OBCs must be extremely reliable to guarantee the health of the satellite and to ensure its correct operation. Thus, they are typically based on processors, Systems-on-Chip (SoC) or microcontrollers with very high reliability, such as redundant or even space-qualified components. Some sort of real-time operating system (RTOS) is often used, imposing significant restrictions on the software implementation, such as the impossibility to use dynamic memory allocation. Computing power, memory and storage are extremely limited in OBCs, as well as downlink bandwidth, since it is mainly intended for housekeeping and essential telemetry. All these limitations are even worse for OBCs in cubesats and small satellites.
On the other hand, for simplicity, reliability or simply due to cost limitations, some cubesats and small satellites only have an OBC, without any OBDH that could provide more computing and downlink resources. This poses very tight restrictions on the amount of data that can be acquired and transmitted. Data compression could obviously be a solution to this, but the extreme limitations mentioned are a challenge difficult to overcome. Hardware-based data compression could solve this, but it would require either expensive dedicated chips or a programmable hardware device (such as an FPGA), resulting in higher complexity and development costs. Either option is quite blocking in the NewSpace paradigm, which aims at agile solutions typically based on software. In the end, even a very modest (but extremely fast) data compressor can provide a significant added value to an OBC-only mission, because in nearly all cases the alternative is not to compress the data.
In this work we present an alternative entropy coding core for the FAPEC data compression framework, which we have called FASEC (Fast and Simple Entropy Coder). FASEC has been designed to minimize condition checks and loops, which are some of the bottlenecks in the original FAPEC core. Bytewise memory accesses are enforced, instead of bitwise ones, to further optimize its operation. As a proof of concept, the current implementation only supports 8-bit samples. Only a simple pre-processing stage has been embedded in the same entropy coder, namely, delta decorrelator with or without interleaving.
Together with some optimizations done to the original FAPEC framework, we have been able to run it under FreeRTOS on a Cortex-M4 160 MHz SoC with only 128 KB of RAM and 512 KB of flash memory, developed by IEEC as part of its C3SatP cubesat platform [3]. Preliminary tests reveal that FASEC can double the throughput of FAPEC at the cost of a moderate reduction in the compression ratio, as otherwise expected. Here we present these tests, which demonstrate the feasibility of running a data compressor on an OBC, thus boosting its downlink capabilities without compromising reliability. Future developments will include support for 16-bit samples, further optimizations, and the integration of FASEC in more complex pre-processing stages.

[1] J. Portell, R. Iudica, E. García-Berro, A. G. Villafranca and G. Artigues (2017) FAPEC, a versatile and efficient data compressor for space missions, International Journal of Remote Sensing, 39:7, 2022-2042, DOI: 10.1080/01431161.2017.1399478
[2] J. Portell, E. García-Berro and A. G. Villafranca (2010) Quick outlier-resilient entropy coder for space missions, Journal of Applied Remote Sensing 4(1), 339-363, DOI: 10.1117/1.3479585
[3] J. Ramos-Castro, J. Colomé, J.M. Gómez-Cama et al. (2019) High-performance on-board computer and comms for cubesats, in European Workshop on On-Board Data Processing 2019, edited by ESA/CNES/DLR, ESTEC, The Netherlands, February 25-27